rubenslte/android_kernel_samsung_msm8226
1
Fork 1
mirror of https://github.com/LineageOS/android_kernel_samsung_msm8226.git synced 2026-09-28 00:00:22 +02:00
Code Issues Packages Projects Releases Wiki Activity

Revert "msm: kgsl: Implement KGSL fault tolerance policy in the dispatcher"

Browse Source 
This reverts commit 246e37be56.

Change-Id: Ife8ac91e76165a55bc7e0296e33573133a2fe1d5
Signed-off-by: Tarun Karra <tkarra@codeaurora.org>
This commit is contained in:
Tarun Karra
2013-08-16 14:00:52 -07:00
parent cc701bda54
commit d0679d56c8
11 changed files with 287 additions and 923 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/msm/adreno.c
+30 -42
View File
@@ -114,6 +114,18 @@ static struct adreno_device device_3d0 = {
.long_ib_detect = 1,
};
/* This set of registers are used for Hang detection
* If the values of these registers are same after
* KGSL_TIMEOUT_PART time, GPU hang is reported in
* kernel log.
* *****ALERT******ALERT********ALERT*************
* Order of registers below is important, registers
* from LONG_IB_DETECT_REG_INDEX_START to
* LONG_IB_DETECT_REG_INDEX_END are used in long ib detection.
*/
#define LONG_IB_DETECT_REG_INDEX_START 1
#define LONG_IB_DETECT_REG_INDEX_END 5
unsigned int ft_detect_regs[FT_DETECT_REGS_COUNT];
/*
@@ -1710,9 +1722,6 @@ static int adreno_start(struct kgsl_device *device)
(device->pwrctrl.gpu_cx &&
regulator_is_enabled(device->pwrctrl.gpu_cx)));
/* Clear any GPU faults that might have been left over */
adreno_set_gpu_fault(adreno_dev, 0);
/* Power up the device */
kgsl_pwrctrl_enable(device);
@@ -1821,35 +1830,29 @@ static int adreno_stop(struct kgsl_device *device)
*/
int adreno_reset(struct kgsl_device *device)
{
int ret = 0;
int ret;
/* Try soft reset first */
if (adreno_soft_reset(device) != 0) {
KGSL_DEV_ERR_ONCE(device, "Device soft reset failed\n");
if (adreno_soft_reset(device) == 0)
return 0;
/* If it failed, then pull the power */
ret = adreno_stop(device);
if (ret)
return ret;
/* If it failed, then pull the power */
ret = adreno_stop(device);
if (ret)
return ret;
ret = adreno_start(device);
ret = adreno_start(device);
if (ret)
return ret;
if (ret == 0) {
/*
* If active_cnt is non-zero then the system was active before
* going into a reset - put it back in that state
*/
if (atomic_read(&device->active_cnt))
kgsl_pwrctrl_set_state(device, KGSL_STATE_ACTIVE);
}
/*
* If active_cnt is non-zero then the system was active before
* going into a reset - put it back in that state
*/
if (atomic_read(&device->active_cnt))
kgsl_pwrctrl_set_state(device, KGSL_STATE_ACTIVE);
/* Set the page table back to the default page table */
kgsl_mmu_setstate(&device->mmu, device->mmu.defaultpagetable,
KGSL_MEMSTORE_GLOBAL);
return ret;
}
@@ -2307,13 +2310,6 @@ int adreno_soft_reset(struct kgsl_device *device)
/* Stop the ringbuffer */
adreno_ringbuffer_stop(&adreno_dev->ringbuffer);
if (kgsl_pwrctrl_isenabled(device))
device->ftbl->irqctrl(device, 0);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
adreno_set_gpu_fault(adreno_dev, 0);
/* Delete the idle timer */
del_timer_sync(&device->idle_timer);
@@ -2395,20 +2391,12 @@ int adreno_idle(struct kgsl_device *device)
0x110, 0x110);
while (time_before(jiffies, wait)) {
/*
* If we fault, stop waiting and return an error. The dispatcher
* will clean up the fault from the work queue, but we need to
* make sure we don't block it by waiting for an idle that
* will never come.
*/
if (adreno_gpu_fault(adreno_dev) != 0)
return -EDEADLK;
if (adreno_isidle(device))
return 0;
}
kgsl_postmortem_dump(device, 0);
return -ETIMEDOUT;
}
drivers/gpu/msm/adreno.h
+15 -57
View File
@@ -35,11 +35,12 @@
#define ADRENO_CHIPID_PATCH(_id) ((_id) & 0xFF)
/* Flags to control command packet settings */
#define KGSL_CMD_FLAGS_NONE 0
#define KGSL_CMD_FLAGS_PMODE BIT(0)
#define KGSL_CMD_FLAGS_INTERNAL_ISSUE BIT(1)
#define KGSL_CMD_FLAGS_WFI BIT(2)
#define KGSL_CMD_FLAGS_PROFILE BIT(3)
#define KGSL_CMD_FLAGS_NONE 0x00000000
#define KGSL_CMD_FLAGS_PMODE 0x00000001
#define KGSL_CMD_FLAGS_INTERNAL_ISSUE 0x00000002
#define KGSL_CMD_FLAGS_GET_INT 0x00000004
#define KGSL_CMD_FLAGS_PROFILE 0x00000008
#define KGSL_CMD_FLAGS_EOF 0x00000100
/* Command identifiers */
#define KGSL_CONTEXT_TO_MEM_IDENTIFIER 0x2EADBEEF
@@ -95,10 +96,6 @@ enum coresight_debug_reg {
TRACE_BUS_CTL,
};
#define ADRENO_SOFT_FAULT 1
#define ADRENO_HARD_FAULT 2
#define ADRENO_TIMEOUT_FAULT 3
/*
* Maximum size of the dispatcher ringbuffer - the actual inflight size will be
* smaller then this but this size will allow for a larger range of inflight
@@ -113,7 +110,7 @@ enum coresight_debug_reg {
* @state: Current state of the dispatcher (active or paused)
* @timer: Timer to monitor the progress of the command batches
* @inflight: Number of command batch operations pending in the ringbuffer
* @fault: Non-zero if a fault was detected.
* @fault: True if a HW fault was detected
* @pending: Priority list of contexts waiting to submit command batches
* @plist_lock: Spin lock to protect the pending queue
* @cmdqueue: Queue of command batches currently flight
@@ -128,9 +125,8 @@ struct adreno_dispatcher {
struct mutex mutex;
unsigned int state;
struct timer_list timer;
struct timer_list fault_timer;
unsigned int inflight;
atomic_t fault;
int fault;
struct plist_head pending;
spinlock_t plist_lock;
struct kgsl_cmdbatch *cmdqueue[ADRENO_DISPATCH_CMDQUEUE_SIZE];
@@ -344,16 +340,13 @@ struct log_field {
};
/* Fault Tolerance policy flags */
#define KGSL_FT_OFF 0
#define KGSL_FT_REPLAY 1
#define KGSL_FT_SKIPIB 2
#define KGSL_FT_SKIPFRAME 3
#define KGSL_FT_DISABLE 4
#define KGSL_FT_TEMP_DISABLE 5
#define KGSL_FT_DEFAULT_POLICY (BIT(KGSL_FT_REPLAY) + BIT(KGSL_FT_SKIPIB))
/* This internal bit is used to skip the PM dump on replayed command batches */
#define KGSL_FT_SKIP_PMDUMP 31
#define KGSL_FT_OFF BIT(0)
#define KGSL_FT_REPLAY BIT(1)
#define KGSL_FT_SKIPIB BIT(2)
#define KGSL_FT_SKIPFRAME BIT(3)
#define KGSL_FT_DISABLE BIT(4)
#define KGSL_FT_TEMP_DISABLE BIT(5)
#define KGSL_FT_DEFAULT_POLICY (KGSL_FT_REPLAY + KGSL_FT_SKIPIB)
/* Pagefault policy flags */
#define KGSL_FT_PAGEFAULT_INT_ENABLE BIT(0)
@@ -363,14 +356,6 @@ struct log_field {
#define KGSL_FT_PAGEFAULT_DEFAULT_POLICY (KGSL_FT_PAGEFAULT_INT_ENABLE + \
KGSL_FT_PAGEFAULT_GPUHALT_ENABLE)
#define ADRENO_FT_TYPES \
{ BIT(KGSL_FT_OFF), "off" }, \
{ BIT(KGSL_FT_REPLAY), "replay" }, \
{ BIT(KGSL_FT_SKIPIB), "skipib" }, \
{ BIT(KGSL_FT_SKIPFRAME), "skipframe" }, \
{ BIT(KGSL_FT_DISABLE), "disable" }, \
{ BIT(KGSL_FT_TEMP_DISABLE), "temp" }
extern struct adreno_gpudev adreno_a2xx_gpudev;
extern struct adreno_gpudev adreno_a3xx_gpudev;
@@ -756,31 +741,4 @@ static inline unsigned int adreno_getreg(struct adreno_device *adreno_dev,
return ADRENO_REG_REGISTER_MAX;
return adreno_dev->gpudev->reg_offsets->offsets[offset_name];
}
/**
* adreno_gpu_fault() - Return the current state of the GPU
* @adreno_dev: A ponter to the adreno_device to query
*
* Return 0 if there is no fault or positive with the last type of fault that
* occurred
*/
static inline unsigned int adreno_gpu_fault(struct adreno_device *adreno_dev)
{
smp_rmb();
return atomic_read(&adreno_dev->dispatcher.fault);
}
/**
* adreno_set_gpu_fault() - Set the current fault status of the GPU
* @adreno_dev: A pointer to the adreno_device to set
* @state: fault state to set
*
*/
static inline void adreno_set_gpu_fault(struct adreno_device *adreno_dev,
int state)
{
atomic_set(&adreno_dev->dispatcher.fault, state);
smp_wmb();
}
#endif /*__ADRENO_H */
drivers/gpu/msm/adreno_a3xx.c
+2 -7
View File
@@ -2596,7 +2596,7 @@ static void a3xx_err_callback(struct adreno_device *adreno_dev, int bit)
/* Clear the error */
kgsl_regwrite(device, A3XX_RBBM_AHB_CMD, (1 << 3));
goto done;
return;
}
case A3XX_INT_RBBM_REG_TIMEOUT:
err = "RBBM: AHB register timeout";
@@ -2637,15 +2637,10 @@ static void a3xx_err_callback(struct adreno_device *adreno_dev, int bit)
case A3XX_INT_UCHE_OOB_ACCESS:
err = "UCHE: Out of bounds access";
break;
default:
return;
}
KGSL_DRV_CRIT(device, "%s\n", err);
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
done:
/* Trigger a fault in the dispatcher - this will effect a restart */
adreno_dispatcher_irq_fault(device);
}
static void a3xx_cp_callback(struct adreno_device *adreno_dev, int irq)
drivers/gpu/msm/adreno_dispatch.c
+190 -664
View File
File diff suppressed because it is too large Load Diff
drivers/gpu/msm/adreno_drawctxt.h
-2
View File
@@ -54,8 +54,6 @@
#define CTXT_FLAGS_SKIP_EOF BIT(15)
/* Context no fault tolerance */
#define CTXT_FLAGS_NO_FAULT_TOLERANCE BIT(16)
/* Force the preamble for the next submission */
#define CTXT_FLAGS_FORCE_PREAMBLE BIT(17)
/* Symbolic table for the adreno draw context type */
#define ADRENO_DRAWCTXT_TYPES \
drivers/gpu/msm/adreno_postmortem.c
+33 -5
View File
@@ -396,8 +396,8 @@ EXPORT_SYMBOL(adreno_dump_fields);
int adreno_dump(struct kgsl_device *device, int manual)
{
unsigned int cp_ib1_base;
unsigned int cp_ib2_base;
unsigned int cp_ib1_base, cp_ib1_bufsz;
unsigned int cp_ib2_base, cp_ib2_bufsz;
phys_addr_t pt_base, cur_pt_base;
unsigned int cp_rb_base, cp_rb_ctrl, rb_count;
unsigned int cp_rb_wptr, cp_rb_rptr;
@@ -410,6 +410,7 @@ int adreno_dump(struct kgsl_device *device, int manual)
unsigned int ts_processed = 0xdeaddead;
struct kgsl_context *context;
unsigned int context_id;
unsigned int rbbm_status;
static struct ib_list ib_list;
@@ -419,10 +420,16 @@ int adreno_dump(struct kgsl_device *device, int manual)
mb();
msm_clk_dump_debug_info();
if (device->pm_dump_enable) {
msm_clk_dump_debug_info();
if (adreno_dev->gpudev->postmortem_dump)
adreno_dev->gpudev->postmortem_dump(adreno_dev);
if (adreno_dev->gpudev->postmortem_dump)
adreno_dev->gpudev->postmortem_dump(adreno_dev);
}
kgsl_regread(device,
adreno_getreg(adreno_dev, ADRENO_REG_RBBM_STATUS),
&rbbm_status);
pt_base = kgsl_mmu_get_current_ptbase(&device->mmu);
cur_pt_base = pt_base;
@@ -443,9 +450,30 @@ int adreno_dump(struct kgsl_device *device, int manual)
kgsl_regread(device,
adreno_getreg(adreno_dev, ADRENO_REG_CP_IB1_BASE),
&cp_ib1_base);
kgsl_regread(device,
adreno_getreg(adreno_dev, ADRENO_REG_CP_IB1_BUFSZ),
&cp_ib1_bufsz);
kgsl_regread(device,
adreno_getreg(adreno_dev, ADRENO_REG_CP_IB2_BASE),
&cp_ib2_base);
kgsl_regread(device,
adreno_getreg(adreno_dev, ADRENO_REG_CP_IB2_BUFSZ),
&cp_ib2_bufsz);
trace_adreno_gpu_fault(rbbm_status, cp_rb_rptr, cp_rb_wptr,
cp_ib1_base, cp_ib1_bufsz, cp_ib2_base, cp_ib2_bufsz);
/* If postmortem dump is not enabled, dump minimal set and return */
if (!device->pm_dump_enable) {
KGSL_LOG_DUMP(device,
"STATUS %08X | IB1:%08X/%08X | IB2: %08X/%08X"
" | RPTR: %04X | WPTR: %04X\n",
rbbm_status, cp_ib1_base, cp_ib1_bufsz, cp_ib2_base,
cp_ib2_bufsz, cp_rb_rptr, cp_rb_wptr);
return 0;
}
kgsl_sharedmem_readl(&device->memstore,
(unsigned int *) &context_id,
drivers/gpu/msm/adreno_ringbuffer.c
+6 -39
View File
@@ -606,8 +606,8 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb,
if (adreno_is_a20x(adreno_dev))
total_sizedwords += 2; /* CACHE_FLUSH */
if (flags & KGSL_CMD_FLAGS_WFI)
total_sizedwords += 2; /* WFI */
if (flags & KGSL_CMD_FLAGS_EOF)
total_sizedwords += 2;
if (profile_ready)
total_sizedwords += 6; /* space for pre_ib and post_ib */
@@ -737,12 +737,6 @@ adreno_ringbuffer_addcmds(struct adreno_ringbuffer *rb,
GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu, 0);
}
if (flags & KGSL_CMD_FLAGS_WFI) {
GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu,
cp_type3_packet(CP_WAIT_FOR_IDLE, 1));
GSL_RB_WRITE(rb->device, ringcmds, rcmd_gpu, 0x00000000);
}
adreno_ringbuffer_submit(rb);
return 0;
@@ -1030,7 +1024,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev,
struct kgsl_context *context;
struct adreno_context *drawctxt;
unsigned int start_index = 0;
int flags = KGSL_CMD_FLAGS_NONE;
int ret;
context = cmdbatch->context;
@@ -1046,23 +1039,10 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev,
commands are stored in the first node of the IB chain. We can skip that
if a context switch hasn't occured */
if ((drawctxt->flags & CTXT_FLAGS_PREAMBLE) &&
!test_bit(CMDBATCH_FLAG_FORCE_PREAMBLE, &cmdbatch->priv) &&
(adreno_dev->drawctxt_active == drawctxt))
if (drawctxt->flags & CTXT_FLAGS_PREAMBLE &&
adreno_dev->drawctxt_active == drawctxt)
start_index = 1;
/*
* In skip mode don't issue the draw IBs but keep all the other
* accoutrements of a submision (including the interrupt) to keep
* the accounting sane. Set start_index and numibs to 0 to just
* generate the start and end markers and skip everything else
*/
if (test_bit(CMDBATCH_FLAG_SKIP, &cmdbatch->priv)) {
start_index = 0;
numibs = 0;
}
cmds = link = kzalloc(sizeof(unsigned int) * (numibs * 3 + 4),
GFP_KERNEL);
if (!link) {
@@ -1081,17 +1061,7 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev,
*cmds++ = ibdesc[0].sizedwords;
}
for (i = start_index; i < numibs; i++) {
/*
* Skip 0 sized IBs - these are presumed to have been removed
* from consideration by the FT policy
*/
if (ibdesc[i].sizedwords == 0)
*cmds++ = cp_nop_packet(2);
else
*cmds++ = CP_HDR_INDIRECT_BUFFER_PFD;
*cmds++ = CP_HDR_INDIRECT_BUFFER_PFD;
*cmds++ = ibdesc[i].gpuaddr;
*cmds++ = ibdesc[i].sizedwords;
}
@@ -1115,12 +1085,9 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev,
if (ret)
goto done;
if (test_bit(CMDBATCH_FLAG_WFI, &cmdbatch->priv))
flags = KGSL_CMD_FLAGS_WFI;
ret = adreno_ringbuffer_addcmds(&adreno_dev->ringbuffer,
drawctxt,
flags,
cmdbatch->flags,
&link[0], (cmds - link),
cmdbatch->timestamp);
drivers/gpu/msm/adreno_trace.h
+9 -79
View File
@@ -61,78 +61,14 @@ DECLARE_EVENT_CLASS(adreno_cmdbatch_template,
)
);
DEFINE_EVENT(adreno_cmdbatch_template, adreno_cmdbatch_submitted,
DEFINE_EVENT(adreno_cmdbatch_template, adreno_cmdbatch_retired,
TP_PROTO(struct kgsl_cmdbatch *cmdbatch, int inflight),
TP_ARGS(cmdbatch, inflight)
);
TRACE_EVENT(adreno_cmdbatch_retired,
DEFINE_EVENT(adreno_cmdbatch_template, adreno_cmdbatch_submitted,
TP_PROTO(struct kgsl_cmdbatch *cmdbatch, int inflight),
TP_ARGS(cmdbatch, inflight),
TP_STRUCT__entry(
__field(unsigned int, id)
__field(unsigned int, timestamp)
__field(unsigned int, inflight)
__field(unsigned int, recovery)
),
TP_fast_assign(
__entry->id = cmdbatch->context->id;
__entry->timestamp = cmdbatch->timestamp;
__entry->inflight = inflight;
__entry->recovery = cmdbatch->fault_recovery;
),
TP_printk(
"ctx=%u ts=%u inflight=%u recovery=%s",
__entry->id, __entry->timestamp,
__entry->inflight,
__entry->recovery ?
__print_flags(__entry->recovery, "|",
ADRENO_FT_TYPES) : "none"
)
);
TRACE_EVENT(adreno_cmdbatch_fault,
TP_PROTO(struct kgsl_cmdbatch *cmdbatch, unsigned int fault),
TP_ARGS(cmdbatch, fault),
TP_STRUCT__entry(
__field(unsigned int, id)
__field(unsigned int, timestamp)
__field(unsigned int, fault)
),
TP_fast_assign(
__entry->id = cmdbatch->context->id;
__entry->timestamp = cmdbatch->timestamp;
__entry->fault = fault;
),
TP_printk(
"ctx=%u ts=%u type=%s",
__entry->id, __entry->timestamp,
__print_symbolic(__entry->fault,
{ 0, "none" },
{ ADRENO_SOFT_FAULT, "soft" },
{ ADRENO_HARD_FAULT, "hard" },
{ ADRENO_TIMEOUT_FAULT, "timeout" })
)
);
TRACE_EVENT(adreno_cmdbatch_recovery,
TP_PROTO(struct kgsl_cmdbatch *cmdbatch, unsigned int action),
TP_ARGS(cmdbatch, action),
TP_STRUCT__entry(
__field(unsigned int, id)
__field(unsigned int, timestamp)
__field(unsigned int, action)
),
TP_fast_assign(
__entry->id = cmdbatch->context->id;
__entry->timestamp = cmdbatch->timestamp;
__entry->action = action;
),
TP_printk(
"ctx=%u ts=%u action=%s",
__entry->id, __entry->timestamp,
__print_symbolic(__entry->action, ADRENO_FT_TYPES)
)
TP_ARGS(cmdbatch, inflight)
);
DECLARE_EVENT_CLASS(adreno_drawctxt_template,
@@ -224,15 +160,11 @@ TRACE_EVENT(adreno_drawctxt_switch,
);
TRACE_EVENT(adreno_gpu_fault,
TP_PROTO(unsigned int ctx, unsigned int ts,
unsigned int status, unsigned int rptr, unsigned int wptr,
TP_PROTO(unsigned int status, unsigned int rptr, unsigned int wptr,
unsigned int ib1base, unsigned int ib1size,
unsigned int ib2base, unsigned int ib2size),
TP_ARGS(ctx, ts, status, rptr, wptr, ib1base, ib1size, ib2base,
ib2size),
TP_ARGS(status, rptr, wptr, ib1base, ib1size, ib2base, ib2size),
TP_STRUCT__entry(
__field(unsigned int, ctx)
__field(unsigned int, ts)
__field(unsigned int, status)
__field(unsigned int, rptr)
__field(unsigned int, wptr)
@@ -242,8 +174,6 @@ TRACE_EVENT(adreno_gpu_fault,
__field(unsigned int, ib2size)
),
TP_fast_assign(
__entry->ctx = ctx;
__entry->ts = ts;
__entry->status = status;
__entry->rptr = rptr;
__entry->wptr = wptr;
@@ -252,10 +182,10 @@ TRACE_EVENT(adreno_gpu_fault,
__entry->ib2base = ib2base;
__entry->ib2size = ib2size;
),
TP_printk("ctx=%d ts=%d status=%X RB=%X/%X IB1=%X/%X IB2=%X/%X",
__entry->ctx, __entry->ts, __entry->status, __entry->wptr,
__entry->rptr, __entry->ib1base, __entry->ib1size,
__entry->ib2base, __entry->ib2size)
TP_printk("status=%X RB=%X/%X IB1=%X/%X IB2=%X/%X",
__entry->status, __entry->wptr, __entry->rptr,
__entry->ib1base, __entry->ib1size, __entry->ib2base,
__entry->ib2size)
);
#endif /* _ADRENO_TRACE_H */
drivers/gpu/msm/kgsl_device.h
+1 -21
View File
@@ -160,12 +160,8 @@ struct kgsl_event {
/**
* struct kgsl_cmdbatch - KGSl command descriptor
* @context: KGSL context that created the command
* @timestamp: Timestamp assigned to the command
* @timestamp: Timestamp assigned to the command (currently unused)
* @flags: flags
* @priv: Internal flags
* @fault_policy: Internal policy describing how to handle this command in case
* of a fault
* @fault_recovery: recovery actions actually tried for this batch
* @ibcount: Number of IBs in the command list
* @ibdesc: Pointer to the list of IBs
* @expires: Point in time when the cmdbatch is considered to be hung
@@ -176,28 +172,12 @@ struct kgsl_cmdbatch {
struct kgsl_context *context;
uint32_t timestamp;
uint32_t flags;
unsigned long priv;
unsigned long fault_policy;
unsigned long fault_recovery;
uint32_t ibcount;
struct kgsl_ibdesc *ibdesc;
unsigned long expires;
int invalid;
};
/**
* enum kgsl_cmdbatch_priv - Internal cmdbatch flags
* @CMDBATCH_FLAG_SKIP - skip the entire command batch
* @CMDBATCH_FLAG_FORCE_PREAMBLE - Force the preamble on for the cmdbatch
* @CMDBATCH_FLAG_WFI - Force wait-for-idle for the submission
*/
enum kgsl_cmdbatch_priv {
CMDBATCH_FLAG_SKIP = 0,
CMDBATCH_FLAG_FORCE_PREAMBLE,
CMDBATCH_FLAG_WFI,
};
struct kgsl_device {
struct device *dev;
const char *name;
drivers/gpu/msm/kgsl_iommu.c
+1 -5
View File
@@ -423,12 +423,8 @@ static int kgsl_iommu_fault_handler(struct iommu_domain *domain,
* the GPU and trigger a snapshot. To stall the transaction return
* EBUSY error.
*/
if (adreno_dev->ft_pf_policy & KGSL_FT_PAGEFAULT_GPUHALT_ENABLE) {
/* turn off GPU IRQ so we don't get faults from it too */
kgsl_pwrctrl_irq(device, KGSL_PWRFLAGS_OFF);
adreno_dispatcher_irq_fault(device);
if (adreno_dev->ft_pf_policy & KGSL_FT_PAGEFAULT_GPUHALT_ENABLE)
ret = -EBUSY;
}
done:
return ret;
}
include/linux/msm_kgsl.h
-2
View File
@@ -20,8 +20,6 @@
#define KGSL_CONTEXT_TRASH_STATE 0x00000020
#define KGSL_CONTEXT_PER_CONTEXT_TS 0x00000040
#define KGSL_CONTEXT_USER_GENERATED_TS 0x00000080
#define KGSL_CONTEXT_END_OF_FRAME 0x00000100
#define KGSL_CONTEXT_NO_FAULT_TOLERANCE 0x00000200
/* bits [12:15] are reserved for future use */
#define KGSL_CONTEXT_TYPE_MASK 0x01F00000