msm: dma: remove crci conflict checking

The crci conflict checking code was designed for a system where a crci's
mux could be changed at runtime. In reality, our chips configure these
statically, so it is not necessary.

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>

arch/arm/mach-msm/dma.c

@@ -59,7 +59,6 @@ struct msm_dmov_conf {
 	int channel_active;
 	struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT];
 	struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT];
-	unsigned int crci_mask;
 	spinlock_t lock;
 	unsigned int irq;
 	struct clk *clk;
@@ -276,132 +275,10 @@ void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful)
 }
 EXPORT_SYMBOL(msm_dmov_stop_cmd);
 
-#define	CRCI_UNUSED   0
-#define	CRCI_CONFLICT 1
-#define	CRCI_MUX_OFF  2
-#define	CRCI_MUX_ON   3
-
-#ifdef CONFIG_MSM_ADM3
-static int crci_mask_compare(unsigned int x, unsigned int y)
-{
-	unsigned int mask;
-	int i;
-	for (i = 0; i < MSM_DMOV_CRCI_COUNT; i++) {
-		mask = (x ^ y) >> (2*i);
-		if ((mask & 3) == CRCI_CONFLICT)
-			return 1;
-	}
-	return 0;
-}
-#endif
-
-static int check_crci_conflict(struct msm_dmov_cmd *cmd, int adm)
-{
-#ifdef CONFIG_MSM_ADM3
-	int i;
-	struct msm_dmov_cmd *iter;
-	struct list_head *cmd_list;
-	unsigned int active_crci_mask = 0;
-
-	for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) {
-		cmd_list = &dmov_conf[adm].active_commands[i];
-		list_for_each_entry(iter, cmd_list, list) {
-			active_crci_mask |= iter->crci_mask;
-		}
-	}
-	return crci_mask_compare(cmd->crci_mask, active_crci_mask);
-#endif
-	return 0;
-}
-
-#define CRCI_MUXSEL(n) (((n) >> 4) & 1)
-#define CRCI_NUM(n)    ((n) & 0xF)
-
-unsigned int msm_dmov_build_crci_mask(int n, ...)
-{
-	unsigned int mask = 0;
-#ifdef CONFIG_MSM_ADM3
-	int i;
-	int crci;
-	int crci_num;
-	unsigned int crci_muxsel;
-	va_list crcis;
-	va_start(crcis, n);
-	for (i = 0; i < n; i++) {
-		crci = va_arg(crcis, int);
-		crci_muxsel = CRCI_MUXSEL(crci);
-		crci_num = CRCI_NUM(crci);
-		mask |= (1 << (2*crci_num + 1));
-		mask |= (crci_muxsel << (2*crci_num));
-	}
-	va_end(crcis);
-#endif
-	return mask;
-}
-EXPORT_SYMBOL(msm_dmov_build_crci_mask);
-
-
-static void set_crci_mask(int crci_mask, int adm)
-{
-#ifdef CONFIG_MSM_ADM3
-	int i;
-	int blk_size;
-	unsigned int crci_ctl;
-	unsigned int tmp_crci_mask;
-	unsigned int blank_mask;
-
-	for (i = 0; i < MSM_DMOV_CRCI_COUNT; i++) {
-		tmp_crci_mask = (crci_mask >> (2*i)) & 3;
-		if (crci_mask_compare(dmov_conf[adm].crci_mask,
-				      tmp_crci_mask << (2*i))) {
-			blank_mask = ~(3 << (2*i));
-			blk_size = dmov_conf[adm].crci_conf[i].blk_size;
-			crci_ctl =  DMOV_CRCI_CTL_BLK_SZ(blk_size);
-			if (tmp_crci_mask == CRCI_MUX_ON)
-				crci_ctl |= DMOV_CRCI_MUX;
-
-			writel_relaxed(crci_ctl, DMOV_REG(DMOV_CRCI_CTL(i),
-				       adm));
-			dmov_conf[adm].crci_mask &= blank_mask;
-			dmov_conf[adm].crci_mask |= (tmp_crci_mask << (2*i));
-		}
-	}
-	wmb();
-#endif
-}
-
-static void start_ready_cmds(int adm)
-{
-#ifdef CONFIG_MSM_ADM3
-	int i;
-	unsigned int status;
-	struct list_head *rdy;
-	struct list_head *act;
-	struct msm_dmov_cmd *cmd;
-	for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) {
-		rdy = &dmov_conf[adm].ready_commands[i];
-		act = &dmov_conf[adm].active_commands[i];
-		cmd = list_entry(rdy->next, typeof(*cmd), list);
-		if (!list_empty(rdy) && !check_crci_conflict(cmd, adm)) {
-			status = readl_relaxed(DMOV_REG(DMOV_STATUS(i), adm));
-			if (status & DMOV_STATUS_CMD_PTR_RDY) {
-				list_del(&cmd->list);
-				list_add_tail(&cmd->list, act);
-				dmov_conf[adm].channel_active |= (1 << i);
-				set_crci_mask(cmd->crci_mask, adm);
-				writel_relaxed(cmd->cmdptr,
-				       DMOV_REG(DMOV_CMD_PTR(i), adm));
-			}
-		}
-	}
-#endif
-}
-
 void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd)
 {
 	unsigned long irq_flags;
 	unsigned int status;
-	int conflict;
 	int adm = DMOV_ID_TO_ADM(id);
 	int ch = DMOV_ID_TO_CHAN(id);
 
@@ -413,8 +290,7 @@ void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd)
 	dmov_conf[adm].clk_ctl = CLK_EN;
 
 	status = readl_relaxed(DMOV_REG(DMOV_STATUS(ch), adm));
-	conflict = check_crci_conflict(cmd, adm);
-	if ((status & DMOV_STATUS_CMD_PTR_RDY) && !conflict) {
+	if (status & DMOV_STATUS_CMD_PTR_RDY) {
 		PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n",
 			id, status);
 		if (cmd->exec_func)
@@ -424,15 +300,13 @@ void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd)
 			enable_irq(dmov_conf[adm].irq);
 		dmov_conf[adm].channel_active |= 1U << ch;
 		PRINT_IO("Writing %x exactly to register", cmd->cmdptr);
-		set_crci_mask(cmd->crci_mask, adm);
 		writel_relaxed(cmd->cmdptr, DMOV_REG(DMOV_CMD_PTR(ch), adm));
 	} else {
 		if (!dmov_conf[adm].channel_active) {
 			dmov_conf[adm].clk_ctl = CLK_TO_BE_DIS;
 			mod_timer(&dmov_conf[adm].timer, jiffies + HZ);
 		}
-		if (list_empty(&dmov_conf[adm].active_commands[ch])
-		    && !conflict)
+		if (list_empty(&dmov_conf[adm].active_commands[ch]))
 			PRINT_ERROR("msm_dmov_enqueue_cmd_ext(%d), stalled, "
 				"status %x\n", id, status);
 		PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status "
@@ -489,14 +363,13 @@ dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd,
 	complete(&cmd->complete);
 }
 
-int msm_dmov_exec_cmd(unsigned id, unsigned int crci_mask, unsigned int cmdptr)
+int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr)
 {
 	struct msm_dmov_exec_cmdptr_cmd cmd;
 
 	PRINT_FLOW("dmov_exec_cmdptr(%d, %x)\n", id, cmdptr);
 
 	cmd.dmov_cmd.cmdptr = cmdptr;
-	cmd.dmov_cmd.crci_mask = crci_mask;
 	cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func;
 	cmd.dmov_cmd.exec_func = NULL;
 	cmd.id = id;
@@ -609,7 +482,6 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
 			rmb();
 			ch_status = readl_relaxed(DMOV_REG(DMOV_STATUS(ch),
 						  adm));
-#ifndef CONFIG_MSM_ADM3
 			PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
 			if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) &&
 			    !list_empty(&dmov_conf[adm].ready_commands[ch])) {
@@ -625,7 +497,6 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
 				writel_relaxed(cmd->cmdptr,
 					       DMOV_REG(DMOV_CMD_PTR(ch), adm));
 			}
-#endif
 		} while (ch_status & DMOV_STATUS_RSLT_VALID);
 		if (list_empty(&dmov_conf[adm].active_commands[ch]) &&
 				list_empty(&dmov_conf[adm].ready_commands[ch]))
@@ -633,7 +504,6 @@ static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id)
 		PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status);
 	}
 
-	start_ready_cmds(adm);
 	if (!dmov_conf[adm].channel_active) {
 		disable_irq_nosync(dmov_conf[adm].irq);
 		dmov_conf[adm].clk_ctl = CLK_TO_BE_DIS;

arch/arm/mach-msm/dma_test.c

@@ -140,7 +140,7 @@ static int dma_scopy(struct msm_dma_scopy *scopy, struct private *priv)
 					sizeof(*priv->command_ptr_ptr),
 					DMA_TO_DEVICE);
 
-	msm_dmov_exec_cmd(TEST_CHANNEL, 0,
+	msm_dmov_exec_cmd(TEST_CHANNEL,
 			  DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(mapped_cmd_ptr));
 
 	dma_unmap_single(NULL, (dma_addr_t) mapped_cmd_ptr,

arch/arm/mach-msm/include/mach/dma.h

@@ -31,7 +31,6 @@ struct msm_dmov_errdata {
 struct msm_dmov_cmd {
 	struct list_head list;
 	unsigned int cmdptr;
-	unsigned int crci_mask;
 	void (*complete_func)(struct msm_dmov_cmd *cmd,
 			      unsigned int result,
 			      struct msm_dmov_errdata *err);
@@ -43,8 +42,7 @@ void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
 void msm_dmov_enqueue_cmd_ext(unsigned id, struct msm_dmov_cmd *cmd);
 void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
 void msm_dmov_flush(unsigned int id);
-int msm_dmov_exec_cmd(unsigned id, unsigned int crci_mask, unsigned int cmdptr);
-unsigned int msm_dmov_build_crci_mask(int n, ...);
+int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
 
 #define DMOV_CRCIS_PER_CONF 10
 

drivers/crypto/msm/qce.c

@@ -1701,8 +1701,6 @@ static int _setup_cmd_template(struct qce_device *pce_dev)
 	pce_dev->chan_ce_in_cmd->exec_func = NULL;
 	pce_dev->chan_ce_in_cmd->cmdptr = DMOV_CMD_ADDR(
 			(unsigned int) pce_dev->phy_cmd_pointer_list_ce_in);
-	pce_dev->chan_ce_in_cmd->crci_mask = msm_dmov_build_crci_mask(2,
-			pce_dev->crci_in, pce_dev->crci_hash);
 	/*
 	 * The first command in the command list ce_out.
 	 * It is for encry/decryp output.
@@ -1749,8 +1747,6 @@ static int _setup_cmd_template(struct qce_device *pce_dev)
 	pce_dev->chan_ce_out_cmd->exec_func = NULL;
 	pce_dev->chan_ce_out_cmd->cmdptr = DMOV_CMD_ADDR(
 			(unsigned int) pce_dev->phy_cmd_pointer_list_ce_out);
-	pce_dev->chan_ce_out_cmd->crci_mask = msm_dmov_build_crci_mask(2,
-			pce_dev->crci_out, pce_dev->crci_hash);
 
 
 	return 0;

drivers/crypto/msm/qce40.c

@@ -1487,9 +1487,6 @@ static int _setup_cmd_template(struct qce_device *pce_dev)
 	pce_dev->chan_ce_in_cmd->exec_func = NULL;
 	pce_dev->chan_ce_in_cmd->cmdptr = DMOV_CMD_ADDR(
 			(unsigned int) pce_dev->phy_cmd_pointer_list_ce_in);
-	pce_dev->chan_ce_in_cmd->crci_mask = msm_dmov_build_crci_mask(1,
-			pce_dev->crci_in);
-
 
 	/*
 	 * The first command in the command list ce_out.
@@ -1527,8 +1524,6 @@ static int _setup_cmd_template(struct qce_device *pce_dev)
 	pce_dev->chan_ce_out_cmd->exec_func = NULL;
 	pce_dev->chan_ce_out_cmd->cmdptr = DMOV_CMD_ADDR(
 			(unsigned int) pce_dev->phy_cmd_pointer_list_ce_out);
-	pce_dev->chan_ce_out_cmd->crci_mask = msm_dmov_build_crci_mask(1,
-			pce_dev->crci_out);
 
 	return 0;
 };

drivers/mmc/host/msm_sdcc.c

@@ -777,7 +777,6 @@ static int msmsdcc_config_dma(struct msmsdcc_host *host, struct mmc_data *data)
 	host->dma.hdr.cmdptr = DMOV_CMD_PTR_LIST |
 			       DMOV_CMD_ADDR(host->dma.cmdptr_busaddr);
 	host->dma.hdr.complete_func = msmsdcc_dma_complete_func;
-	host->dma.hdr.crci_mask = msm_dmov_build_crci_mask(1, host->dma.crci);
 
 	n = dma_map_sg(mmc_dev(host->mmc), host->dma.sg,
 			host->dma.num_ents, host->dma.dir);

drivers/mtd/devices/msm_nand.c

@@ -41,7 +41,6 @@ unsigned long ebi2_register_base;
 uint32_t dual_nand_ctlr_present;
 uint32_t interleave_enable;
 uint32_t enable_bch_ecc;
-unsigned crci_mask;
 
 #define MSM_NAND_DMA_BUFFER_SIZE SZ_8K
 #define MSM_NAND_DMA_BUFFER_SLOTS \
@@ -294,7 +293,7 @@ unsigned flash_rd_reg(struct msm_nand_chip *chip, unsigned addr)
 
 	mb();
 	msm_dmov_exec_cmd(
-		chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST |
+		chip->dma_channel, DMOV_CMD_PTR_LIST |
 		DMOV_CMD_ADDR(msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 	mb();
 
@@ -328,7 +327,7 @@ void flash_wr_reg(struct msm_nand_chip *chip, unsigned addr, unsigned val)
 
 	mb();
 	msm_dmov_exec_cmd(
-		chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST |
+		chip->dma_channel, DMOV_CMD_PTR_LIST |
 		DMOV_CMD_ADDR(msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 	mb();
 
@@ -413,7 +412,7 @@ uint32_t flash_read_id(struct msm_nand_chip *chip)
 			) | CMD_PTR_LP;
 
 	mb();
-	msm_dmov_exec_cmd(chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST |
+	msm_dmov_exec_cmd(chip->dma_channel, DMOV_CMD_PTR_LIST |
 		DMOV_CMD_ADDR(msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 	mb();
 
@@ -678,7 +677,7 @@ uint32_t flash_onfi_probe(struct msm_nand_chip *chip)
 				>> 3) | CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 			&dma_buffer->cmdptr)));
 		mb();
@@ -1051,7 +1050,7 @@ static int msm_nand_read_oob(struct mtd_info *mtd, loff_t from,
 			| CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 			&dma_buffer->cmdptr)));
 		mb();
@@ -1832,7 +1831,7 @@ static int msm_nand_read_oob_dualnandc(struct mtd_info *mtd, loff_t from,
 			| CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 			&dma_buffer->cmdptr)));
 		mb();
@@ -2276,7 +2275,7 @@ msm_nand_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops)
 			CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(
 				msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 		mb();
@@ -2885,7 +2884,7 @@ msm_nand_write_oob_dualnandc(struct mtd_info *mtd, loff_t to,
 		((msm_virt_to_dma(chip, dma_buffer->cmd) >> 3) | CMD_PTR_LP);
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(
 				msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 		mb();
@@ -3079,7 +3078,7 @@ msm_nand_erase(struct mtd_info *mtd, struct erase_info *instr)
 
 	mb();
 	msm_dmov_exec_cmd(
-		chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST |
+		chip->dma_channel, DMOV_CMD_PTR_LIST |
 		DMOV_CMD_ADDR(msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 	mb();
 
@@ -3318,7 +3317,7 @@ msm_nand_erase_dualnandc(struct mtd_info *mtd, struct erase_info *instr)
 
 	mb();
 	msm_dmov_exec_cmd(
-		chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST |
+		chip->dma_channel, DMOV_CMD_PTR_LIST |
 		DMOV_CMD_ADDR(msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 	mb();
 
@@ -3469,7 +3468,7 @@ msm_nand_block_isbad(struct mtd_info *mtd, loff_t ofs)
 				dma_buffer->cmd) >> 3) | CMD_PTR_LP;
 
 	mb();
-	msm_dmov_exec_cmd(chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST |
+	msm_dmov_exec_cmd(chip->dma_channel, DMOV_CMD_PTR_LIST |
 		DMOV_CMD_ADDR(msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 	mb();
 
@@ -3726,7 +3725,7 @@ msm_nand_block_isbad_dualnandc(struct mtd_info *mtd, loff_t ofs)
 				dma_buffer->cmd) >> 3) | CMD_PTR_LP;
 
 	mb();
-	msm_dmov_exec_cmd(chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST |
+	msm_dmov_exec_cmd(chip->dma_channel, DMOV_CMD_PTR_LIST |
 		DMOV_CMD_ADDR(msm_virt_to_dma(chip, &dma_buffer->cmdptr)));
 	mb();
 
@@ -3941,7 +3940,7 @@ uint32_t flash_onenand_probe(struct msm_nand_chip *chip)
 			>> 3) | CMD_PTR_LP;
 
 	mb();
-	msm_dmov_exec_cmd(chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST
+	msm_dmov_exec_cmd(chip->dma_channel, DMOV_CMD_PTR_LIST
 			| DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 			&dma_buffer->cmdptr)));
 	mb();
@@ -4570,7 +4569,7 @@ int msm_onenand_read_oob(struct mtd_info *mtd,
 				>> 3) | CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 				&dma_buffer->cmdptr)));
 		mb();
@@ -5316,7 +5315,7 @@ static int msm_onenand_write_oob(struct mtd_info *mtd, loff_t to,
 				>> 3) | CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 				&dma_buffer->cmdptr)));
 		mb();
@@ -5739,7 +5738,7 @@ static int msm_onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
 			>> 3) | CMD_PTR_LP;
 
 	mb();
-	msm_dmov_exec_cmd(chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST
+	msm_dmov_exec_cmd(chip->dma_channel, DMOV_CMD_PTR_LIST
 			| DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 			&dma_buffer->cmdptr)));
 	mb();
@@ -6203,7 +6202,7 @@ static int msm_onenand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 				>> 3) | CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 				&dma_buffer->cmdptr)));
 		mb();
@@ -6567,7 +6566,7 @@ static int msm_onenand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
 				>> 3) | CMD_PTR_LP;
 
 		mb();
-		msm_dmov_exec_cmd(chip->dma_channel, crci_mask,
+		msm_dmov_exec_cmd(chip->dma_channel,
 			DMOV_CMD_PTR_LIST | DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 				&dma_buffer->cmdptr)));
 		mb();
@@ -6919,7 +6918,7 @@ static int msm_nand_nc10_xfr_settings(struct mtd_info *mtd)
 				| CMD_PTR_LP;
 
 	mb();
-	msm_dmov_exec_cmd(chip->dma_channel, crci_mask, DMOV_CMD_PTR_LIST
+	msm_dmov_exec_cmd(chip->dma_channel, DMOV_CMD_PTR_LIST
 			| DMOV_CMD_ADDR(msm_virt_to_dma(chip,
 			&dma_buffer->cmdptr)));
 	mb();
@@ -7036,9 +7035,6 @@ no_dual_nand_ctlr_support:
 	pr_info("%s: allocated dma buffer at %p, dma_addr %x\n",
 		__func__, info->msm_nand.dma_buffer, info->msm_nand.dma_addr);
 
-	crci_mask = msm_dmov_build_crci_mask(2,
-			DMOV_NAND_CRCI_DATA, DMOV_NAND_CRCI_CMD);
-
 	info->mtd.name = dev_name(&pdev->dev);
 	info->mtd.priv = &info->msm_nand;
 	info->mtd.owner = THIS_MODULE;

drivers/spi/spi_qsd.c

@@ -2134,7 +2134,6 @@ static __init int msm_spi_init_dma(struct msm_spi *dd)
 				   DMOV_CMD_ADDR(dd->rx_dmov_cmd_dma +
 				   offsetof(struct spi_dmov_cmd, cmd_ptr));
 	dd->rx_hdr.complete_func = spi_dmov_rx_complete_func;
-	dd->rx_hdr.crci_mask = msm_dmov_build_crci_mask(1, dd->rx_dma_crci);
 
 	box = &(dd->tx_dmov_cmd->box);
 	box->cmd = CMD_MODE_BOX | CMD_DST_CRCI(dd->tx_dma_crci);
@@ -2143,7 +2142,6 @@ static __init int msm_spi_init_dma(struct msm_spi *dd)
 			    DMOV_CMD_ADDR(dd->tx_dmov_cmd_dma +
 			    offsetof(struct spi_dmov_cmd, cmd_ptr));
 	dd->tx_hdr.complete_func = spi_dmov_tx_complete_func;
-	dd->tx_hdr.crci_mask = msm_dmov_build_crci_mask(1, dd->tx_dma_crci);
 
 	dd->tx_dmov_cmd->single_pad.cmd = CMD_MODE_SINGLE | CMD_LC |
 					  CMD_DST_CRCI(dd->tx_dma_crci);

drivers/tty/serial/msm_serial_hs.c

@@ -1654,9 +1654,6 @@ static int msm_hs_startup(struct uart_port *uport)
 
 	tx->xfer.complete_func = msm_hs_dmov_tx_callback;
 
-	tx->xfer.crci_mask = msm_dmov_build_crci_mask(1,
-						      msm_uport->dma_tx_crci);
-
 	tx->command_ptr->cmd = CMD_LC |
 	    CMD_DST_CRCI(msm_uport->dma_tx_crci) | CMD_MODE_BOX;
 
@@ -1788,9 +1785,6 @@ static int uartdm_init_port(struct uart_port *uport)
 
 	rx->xfer.complete_func = msm_hs_dmov_rx_callback;
 
-	rx->xfer.crci_mask = msm_dmov_build_crci_mask(1,
-						      msm_uport->dma_rx_crci);
-
 	rx->command_ptr->cmd = CMD_LC |
 	    CMD_SRC_CRCI(msm_uport->dma_rx_crci) | CMD_MODE_BOX;