coresight: appropriately handle hardware event mux control registers

Modify the hardware events driver so that it can handle the hardware event
mux control register addresses being greater than 32 bits.

Change-Id: Id41ce183fa946b14590947f21fbcea361393543f
Signed-off-by: Pushkar Joshi <pushkarj@codeaurora.org>
This commit is contained in:
Pushkar Joshi
2013-07-29 17:52:34 -07:00
parent a009193002
commit c791fb3e80
3 changed files with 7 additions and 7 deletions
+1 -1
View File
@@ -136,7 +136,7 @@ void msm_qdss_csr_disable_flush(void)
}
EXPORT_SYMBOL(msm_qdss_csr_disable_flush);
int coresight_csr_hwctrl_set(phys_addr_t addr, uint32_t val)
int coresight_csr_hwctrl_set(uint64_t addr, uint32_t val)
{
struct csr_drvdata *drvdata = csrdrvdata;
int ret = 0;
+4 -4
View File
@@ -130,11 +130,11 @@ static ssize_t hwevent_store_setreg(struct device *dev,
{
struct hwevent_drvdata *drvdata = dev_get_drvdata(dev->parent);
void *hwereg;
phys_addr_t addr;
uint32_t val;
unsigned long long addr;
unsigned long val;
int ret, i;
if (sscanf(buf, "%x %x", &addr, &val) != 2)
if (sscanf(buf, "%llx %lx", &addr, &val) != 2)
return -EINVAL;
mutex_lock(&drvdata->mutex);
@@ -153,7 +153,7 @@ static ssize_t hwevent_store_setreg(struct device *dev,
drvdata->hmux[i].end -
drvdata->hmux[i].start);
if (!hwereg) {
dev_err(dev, "unable to map address 0x%x\n",
dev_err(dev, "unable to map address 0x%llx\n",
addr);
ret = -ENOMEM;
goto err;
+2 -2
View File
@@ -47,13 +47,13 @@ static inline bool coresight_fuse_apps_access_disabled(void) { return false; }
extern void msm_qdss_csr_enable_bam_to_usb(void);
extern void msm_qdss_csr_disable_bam_to_usb(void);
extern void msm_qdss_csr_disable_flush(void);
extern int coresight_csr_hwctrl_set(phys_addr_t addr, uint32_t val);
extern int coresight_csr_hwctrl_set(uint64_t addr, uint32_t val);
extern void coresight_csr_set_byte_cntr(uint32_t);
#else
static inline void msm_qdss_csr_enable_bam_to_usb(void) {}
static inline void msm_qdss_csr_disable_bam_to_usb(void) {}
static inline void msm_qdss_csr_disable_flush(void) {}
static inline int coresight_csr_hwctrl_set(phys_addr_t addr,
static inline int coresight_csr_hwctrl_set(uint64_t addr,
uint32_t val) { return -ENOSYS; }
static inline void coresight_csr_set_byte_cntr(uint32_t val) {}
#endif