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msm: Configure Krait-specific settings

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Write a Krait-specific configuration setting when enabling
the MMU.

Change-Id: I539526a4a3fa28b4b466db35c589afecab4ed257
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
This commit is contained in:
Stepan Moskovchenko
2011-12-14 13:05:45 -08:00
parent 6e28b6d6e6
commit 6fd9c9295c
2 changed files with 19 additions and 1 deletions
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arch/arm/kernel/head.S
+9
View File
@@ -398,6 +398,15 @@ __turn_mmu_on:
mcr p15, 0, r0, c1, c0, 0 @ write control reg
mrc p15, 0, r3, c0, c0, 0 @ read id reg
mov r3, r3
#ifdef CONFIG_ARCH_MSM_KRAIT
ldr r3, =0xff00fc00
and r3, r9, r3
ldr r4, =0x51000400
cmp r3, r4
mrceq p15, 7, r3, c15, c0, 2
biceq r3, r3, #0x400
mcreq p15, 7, r3, c15, c0, 2
#endif
mov r3, r13
mov pc, r3
__enable_mmu_end:
arch/arm/mach-msm/idle-v7.S
+10 -1
View File
@@ -212,8 +212,17 @@ msm_pm_pa_to_va:
mcr p15, 0, r3, c8, c7, 0 /* UTLBIALL */
mcr p15, 0, r3, c7, c5, 6 /* BPIALL */
dsb
isb
#ifdef CONFIG_ARCH_MSM_KRAIT
mrc p15, 0, r1, c0, c0, 0
ldr r3, =0xff00fc00
and r3, r1, r3
ldr r1, =0x51000400
cmp r3, r1
mrceq p15, 7, r3, c15, c0, 2
biceq r3, r3, #0x400
mcreq p15, 7, r3, c15, c0, 2
#endif
stmfd sp!, {lr}
bl v7_flush_kern_cache_all
#ifdef CONFIG_MSM_TRACE_ACROSS_PC