ASoC: msm: Migrate audio drivers to new clock apis.

Use the split clock APIs to do low latency actions (enable/disable)
frequently.  Use the high latency functions (prepare/unprepare)
sparingly to help performance.
Using these split apis instead of the 2 current APIs, allows the
clock driver to perform the slow steps with a mutex lock held and
removes the need to busy wait for the slow steps to finish.

Change-Id: Ic5b89183e86e788397be50d7b6f1d798c13ff417
Signed-off-by: Asish Bhattacharya <asishb@codeaurora.org>
This commit is contained in:
Asish Bhattacharya
2012-05-07 21:59:22 +05:30
parent dafd5a663d
commit 4776d9663a
7 changed files with 42 additions and 42 deletions
+4 -4
View File
@@ -343,7 +343,7 @@ static int msm_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
if (codec_clk) {
clk_set_rate(codec_clk, TABLA_EXT_CLK_RATE);
clk_enable(codec_clk);
clk_prepare_enable(codec_clk);
tabla_mclk_enable(codec, 1, dapm);
} else {
pr_err("%s: Error setting Tabla MCLK\n", __func__);
@@ -359,7 +359,7 @@ static int msm_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
pr_debug("%s: disabling MCLK. clk_users = %d\n",
__func__, clk_users);
tabla_mclk_enable(codec, 0, dapm);
clk_disable(codec_clk);
clk_disable_unprepare(codec_clk);
}
}
return 0;
@@ -381,7 +381,7 @@ static int msm_mclk_event(struct snd_soc_dapm_widget *w,
if (codec_clk) {
clk_set_rate(codec_clk, 12288000);
clk_enable(codec_clk);
clk_prepare_enable(codec_clk);
tabla_mclk_enable(w->codec, 1, true);
} else {
@@ -404,7 +404,7 @@ static int msm_mclk_event(struct snd_soc_dapm_widget *w,
__func__, clk_users);
tabla_mclk_enable(w->codec, 0, true);
clk_disable(codec_clk);
clk_disable_unprepare(codec_clk);
}
break;
}
+2 -2
View File
@@ -321,7 +321,7 @@ static int mdm9615_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
if (codec_clk) {
clk_set_rate(codec_clk, TABLA_EXT_CLK_RATE);
clk_enable(codec_clk);
clk_prepare_enable(codec_clk);
tabla_mclk_enable(codec, 1, dapm);
} else {
pr_err("%s: Error setting Tabla MCLK\n", __func__);
@@ -337,7 +337,7 @@ static int mdm9615_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
pr_debug("%s: disabling MCLK. clk_users = %d\n",
__func__, clk_users);
tabla_mclk_enable(codec, 0, dapm);
clk_disable(codec_clk);
clk_disable_unprepare(codec_clk);
}
}
return 0;
+10 -10
View File
@@ -393,7 +393,7 @@ static int msm_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
if (codec_clk) {
clk_set_rate(codec_clk, TABLA_EXT_CLK_RATE);
clk_enable(codec_clk);
clk_prepare_enable(codec_clk);
tabla_mclk_enable(codec, 1, dapm);
} else {
pr_err("%s: Error setting Tabla MCLK\n", __func__);
@@ -408,7 +408,7 @@ static int msm_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
if (!clk_users) {
pr_debug("%s: disabling MCLK. clk_users = %d\n",
__func__, clk_users);
clk_disable(codec_clk);
clk_disable_unprepare(codec_clk);
tabla_mclk_enable(codec, 0, dapm);
}
}
@@ -431,7 +431,7 @@ static int msm_mclk_event(struct snd_soc_dapm_widget *w,
if (codec_clk) {
clk_set_rate(codec_clk, 12288000);
clk_enable(codec_clk);
clk_prepare_enable(codec_clk);
tabla_mclk_enable(w->codec, 1, true);
} else {
@@ -453,7 +453,7 @@ static int msm_mclk_event(struct snd_soc_dapm_widget *w,
pr_debug("%s: disabling MCLK. clk_users = %d\n",
__func__, clk_users);
clk_disable(codec_clk);
clk_disable_unprepare(codec_clk);
tabla_mclk_enable(w->codec, 0, true);
}
break;
@@ -1014,12 +1014,12 @@ static void mpq8064_sec_i2s_rx_shutdown(struct snd_pcm_substream *substream)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
if (sec_i2s_rx_bit_clk) {
clk_disable(sec_i2s_rx_bit_clk);
clk_disable_unprepare(sec_i2s_rx_bit_clk);
clk_put(sec_i2s_rx_bit_clk);
sec_i2s_rx_bit_clk = NULL;
}
if (sec_i2s_rx_osr_clk) {
clk_disable(sec_i2s_rx_osr_clk);
clk_disable_unprepare(sec_i2s_rx_osr_clk);
clk_put(sec_i2s_rx_osr_clk);
sec_i2s_rx_osr_clk = NULL;
}
@@ -1069,20 +1069,20 @@ static int mpq8064_sec_i2s_rx_startup(struct snd_pcm_substream *substream)
return PTR_ERR(sec_i2s_rx_osr_clk);
}
clk_set_rate(sec_i2s_rx_osr_clk, I2S_MCLK_RATE);
clk_enable(sec_i2s_rx_osr_clk);
clk_prepare_enable(sec_i2s_rx_osr_clk);
sec_i2s_rx_bit_clk = clk_get(cpu_dai->dev, "bit_clk");
if (IS_ERR(sec_i2s_rx_bit_clk)) {
pr_err("Failed to get sec i2s osr_clk\n");
clk_disable(sec_i2s_rx_osr_clk);
clk_disable_unprepare(sec_i2s_rx_osr_clk);
clk_put(sec_i2s_rx_osr_clk);
return PTR_ERR(sec_i2s_rx_bit_clk);
}
clk_set_rate(sec_i2s_rx_bit_clk, 1);
ret = clk_enable(sec_i2s_rx_bit_clk);
ret = clk_prepare_enable(sec_i2s_rx_bit_clk);
if (ret != 0) {
pr_err("Unable to enable sec i2s rx_bit_clk\n");
clk_put(sec_i2s_rx_bit_clk);
clk_disable(sec_i2s_rx_osr_clk);
clk_disable_unprepare(sec_i2s_rx_osr_clk);
clk_put(sec_i2s_rx_osr_clk);
return ret;
}
+2 -2
View File
@@ -457,7 +457,7 @@ static void msm_dai_q6_auxpcm_shutdown(struct snd_pcm_substream *substream,
pr_debug("%s: dai->id = %d aux_pcm_count = %d\n", __func__,
dai->id, aux_pcm_count);
clk_disable(pcm_clk);
clk_disable_unprepare(pcm_clk);
rc = afe_close(PCM_RX); /* can block */
if (IS_ERR_VALUE(rc))
dev_err(dai->dev, "fail to close PCM_RX AFE port\n");
@@ -559,7 +559,7 @@ static int msm_dai_q6_auxpcm_prepare(struct snd_pcm_substream *substream,
return rc;
}
clk_enable(pcm_clk);
clk_prepare_enable(pcm_clk);
clk_reset(pcm_clk, CLK_RESET_DEASSERT);
mutex_unlock(&aux_pcm_mutex);
+10 -10
View File
@@ -196,7 +196,7 @@ static int msm8660_wm8903_enable_mclk(int enable)
}
/* Master clock OSR 256 */
clk_set_rate(wm8903_mclk, 48000 * 256);
ret = clk_enable(wm8903_mclk);
ret = clk_prepare_enable(wm8903_mclk);
if (ret != 0) {
pr_err("Unable to enable i2s_mic_osr_clk\n");
gpio_free(MSM_CDC_MIC_I2S_MCLK);
@@ -205,7 +205,7 @@ static int msm8660_wm8903_enable_mclk(int enable)
}
} else {
if (wm8903_mclk) {
clk_disable(wm8903_mclk);
clk_disable_unprepare(wm8903_mclk);
clk_put(wm8903_mclk);
gpio_free(MSM_CDC_MIC_I2S_MCLK);
wm8903_mclk = NULL;
@@ -314,7 +314,7 @@ static int msm8660_i2s_startup(struct snd_pcm_substream *substream)
return PTR_ERR(spkr_osr_clk);
}
clk_set_rate(spkr_osr_clk, 48000 * 256);
ret = clk_enable(spkr_osr_clk);
ret = clk_prepare_enable(spkr_osr_clk);
if (ret != 0) {
pr_err("Unable to enable i2s_spkr_osr_clk\n");
clk_put(spkr_osr_clk);
@@ -323,15 +323,15 @@ static int msm8660_i2s_startup(struct snd_pcm_substream *substream)
spkr_bit_clk = clk_get(NULL, "i2s_spkr_bit_clk");
if (IS_ERR(spkr_bit_clk)) {
pr_err("Failed to get i2s_spkr_bit_clk\n");
clk_disable(spkr_osr_clk);
clk_disable_unprepare(spkr_osr_clk);
clk_put(spkr_osr_clk);
return PTR_ERR(spkr_bit_clk);
}
clk_set_rate(spkr_bit_clk, 0);
ret = clk_enable(spkr_bit_clk);
ret = clk_prepare_enable(spkr_bit_clk);
if (ret != 0) {
pr_err("Unable to enable i2s_spkr_bit_clk\n");
clk_disable(spkr_osr_clk);
clk_disable_unprepare(spkr_osr_clk);
clk_put(spkr_osr_clk);
clk_put(spkr_bit_clk);
return ret;
@@ -357,7 +357,7 @@ static int msm8660_i2s_startup(struct snd_pcm_substream *substream)
return PTR_ERR(mic_bit_clk);
}
clk_set_rate(mic_bit_clk, 0);
ret = clk_enable(mic_bit_clk);
ret = clk_prepare_enable(mic_bit_clk);
if (ret != 0) {
pr_err("Unable to enable i2s_mic_bit_clk\n");
clk_put(mic_bit_clk);
@@ -375,17 +375,17 @@ static void msm8660_i2s_shutdown(struct snd_pcm_substream *substream)
tx_hw_param_status = 0;
rx_hw_param_status = 0;
if (spkr_bit_clk) {
clk_disable(spkr_bit_clk);
clk_disable_unprepare(spkr_bit_clk);
clk_put(spkr_bit_clk);
spkr_bit_clk = NULL;
}
if (spkr_osr_clk) {
clk_disable(spkr_osr_clk);
clk_disable_unprepare(spkr_osr_clk);
clk_put(spkr_osr_clk);
spkr_osr_clk = NULL;
}
if (mic_bit_clk) {
clk_disable(mic_bit_clk);
clk_disable_unprepare(mic_bit_clk);
clk_put(mic_bit_clk);
mic_bit_clk = NULL;
}
+12 -12
View File
@@ -170,7 +170,7 @@ static int msm8660_startup(struct snd_pcm_substream *substream)
/* Master clock OSR 256 */
/* Initially set to Lowest sample rate Needed */
clk_set_rate(rx_osr_clk, 8000 * 256);
ret = clk_enable(rx_osr_clk);
ret = clk_prepare_enable(rx_osr_clk);
if (ret != 0) {
pr_debug("Unable to enable i2s_spkr_osr_clk\n");
clk_put(rx_osr_clk);
@@ -179,16 +179,16 @@ static int msm8660_startup(struct snd_pcm_substream *substream)
rx_bit_clk = clk_get(NULL, "i2s_spkr_bit_clk");
if (IS_ERR(rx_bit_clk)) {
pr_debug("Failed to get i2s_spkr_bit_clk\n");
clk_disable(rx_osr_clk);
clk_disable_unprepare(rx_osr_clk);
clk_put(rx_osr_clk);
return PTR_ERR(rx_bit_clk);
}
clk_set_rate(rx_bit_clk, 8);
ret = clk_enable(rx_bit_clk);
ret = clk_prepare_enable(rx_bit_clk);
if (ret != 0) {
pr_debug("Unable to enable i2s_spkr_bit_clk\n");
clk_put(rx_bit_clk);
clk_disable(rx_osr_clk);
clk_disable_unprepare(rx_osr_clk);
clk_put(rx_osr_clk);
return ret;
}
@@ -203,7 +203,7 @@ static int msm8660_startup(struct snd_pcm_substream *substream)
}
/* Master clock OSR 256 */
clk_set_rate(tx_osr_clk, 8000 * 256);
ret = clk_enable(tx_osr_clk);
ret = clk_prepare_enable(tx_osr_clk);
if (ret != 0) {
pr_debug("Unable to enable i2s_mic_osr_clk\n");
clk_put(tx_osr_clk);
@@ -212,16 +212,16 @@ static int msm8660_startup(struct snd_pcm_substream *substream)
tx_bit_clk = clk_get(NULL, "i2s_mic_bit_clk");
if (IS_ERR(tx_bit_clk)) {
pr_debug("Failed to get i2s_mic_bit_clk\n");
clk_disable(tx_osr_clk);
clk_disable_unprepare(tx_osr_clk);
clk_put(tx_osr_clk);
return PTR_ERR(tx_bit_clk);
}
clk_set_rate(tx_bit_clk, 8);
ret = clk_enable(tx_bit_clk);
ret = clk_prepare_enable(tx_bit_clk);
if (ret != 0) {
pr_debug("Unable to enable i2s_mic_bit_clk\n");
clk_put(tx_bit_clk);
clk_disable(tx_osr_clk);
clk_disable_unprepare(tx_osr_clk);
clk_put(tx_osr_clk);
return ret;
}
@@ -243,12 +243,12 @@ static void msm8660_shutdown(struct snd_pcm_substream *substream)
timpani_poweramp_off();
msleep(30);
if (rx_bit_clk) {
clk_disable(rx_bit_clk);
clk_disable_unprepare(rx_bit_clk);
clk_put(rx_bit_clk);
rx_bit_clk = NULL;
}
if (rx_osr_clk) {
clk_disable(rx_osr_clk);
clk_disable_unprepare(rx_osr_clk);
clk_put(rx_osr_clk);
rx_osr_clk = NULL;
}
@@ -257,12 +257,12 @@ static void msm8660_shutdown(struct snd_pcm_substream *substream)
msm_snddev_disable_dmic_power();
msleep(30);
if (tx_bit_clk) {
clk_disable(tx_bit_clk);
clk_disable_unprepare(tx_bit_clk);
clk_put(tx_bit_clk);
tx_bit_clk = NULL;
}
if (tx_osr_clk) {
clk_disable(tx_osr_clk);
clk_disable_unprepare(tx_osr_clk);
clk_put(tx_osr_clk);
tx_osr_clk = NULL;
}
+2 -2
View File
@@ -344,7 +344,7 @@ static int msm8960_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
if (clk_users == 1) {
if (codec_clk) {
clk_set_rate(codec_clk, TABLA_EXT_CLK_RATE);
clk_enable(codec_clk);
clk_prepare_enable(codec_clk);
tabla_mclk_enable(codec, 1, dapm);
} else {
pr_err("%s: Error setting Tabla MCLK\n",
@@ -361,7 +361,7 @@ static int msm8960_enable_codec_ext_clk(struct snd_soc_codec *codec, int enable,
pr_debug("%s: disabling MCLK. clk_users = %d\n",
__func__, clk_users);
tabla_mclk_enable(codec, 0, dapm);
clk_disable(codec_clk);
clk_disable_unprepare(codec_clk);
}
} else {
pr_err("%s: Error releasing Tabla MCLK\n", __func__);