Rohit Vaswani 26e44869e1 arm: gic: Configure the GIC to run in secure mode ...

Configure the GIC to run in secure mode and handle
secure as well as non-secure interrupts. This patch
adds an API to configure an IRQ as a secure IRQ so that
it can be treated as an FIQ in the secure mode.

Change-Id: Ic3321e76c95a4c10d6287ba418e84623e7004cb1
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
Signed-off-by: Sathish Ambley <sambley@codeaurora.org>

2012-02-07 19:27:36 -08:00

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arm_timer.h

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cache-l2x0.h

Merge remote-tracking branch 'common/android-3.0' into msm-3.0

2011-11-16 13:52:50 -08:00

cache-tauros2.h

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clps7111.h

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coresight.h

ARM: etm: Support multiple ETMs/PTMs.

2011-06-14 09:10:00 -07:00

cs89712.h

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debug-8250.S

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debug-pl01x.S

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dec21285.h

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entry-macro-gic.S

ARM: gic: Consolidate PPI handling with request_percpu_irq() API

2011-12-23 18:05:10 -07:00

entry-macro-iomd.S

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ep7211.h

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ep7212.h

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gic.h

arm: gic: Configure the GIC to run in secure mode

2012-02-07 19:27:36 -08:00

icst.h

Update broken web addresses in arch directory.

2010-10-18 11:03:21 +02:00

ioc.h

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iomd.h

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iop3xx-adma.h

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iop3xx-gpio.h

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iop3xx.h

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iop_adma.h

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it8152.h

ARM: it8152: add IT8152_LAST_IRQ definition to fix build error

2011-01-03 23:18:32 +08:00

linkup-l1110.h

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locomo.h

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memc.h

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pci_v3.h

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pl080.h

Fix common misspellings

2011-03-31 11:26:23 -03:00

pl330.h

ARM: 6132/1: PL330: Add common core driver

2010-05-15 15:03:50 +01:00

sa1111.h

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scoop.h

[ARM] scoop: Add CPR register bit definitions

2010-08-05 14:32:26 +08:00

sp810.h

ARM: 6722/1: SPEAr: sp810: switch to slow mode before reset

2011-02-21 19:29:24 +00:00

ssp.h

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timer-sp.h

clockevents: ARM sp804: allow clockevent name to be specified

2011-05-23 18:04:53 +01:00

uengine.h

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vic.h

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