mirror of
https://github.com/LineageOS/android_kernel_samsung_msm8226.git
synced 2026-09-28 00:00:22 +02:00
Ravinder Konka
e595866cdd
Platform drivers may be registered on driver startup for multiple channels which may cause probe and remove events to be called corresponding to driver events. It is possible that not all channels need to be enumerated for normal device operation. The unused channels also add unnecessary delay during sub system restart. Add an extended IOCTL which provides user space an option to unregister a platform driver. CRs-Fixed: 738039 Change-Id: Ifa6284563551ecdd297ae457ea2b35027f60844e Acked-by: Nagarjuna Chaganti <nchagant@qti.qualcomm.com> Signed-off-by: Ravinder Konka <rkonka@codeaurora.org> Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
156 lines
6.8 KiB
C
156 lines
6.8 KiB
C
#ifndef _MSM_RMNET_H_
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#define _MSM_RMNET_H_
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/* Bitmap macros for RmNET driver operation mode. */
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#define RMNET_MODE_NONE (0x00)
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#define RMNET_MODE_LLP_ETH (0x01)
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#define RMNET_MODE_LLP_IP (0x02)
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#define RMNET_MODE_QOS (0x04)
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#define RMNET_MODE_MASK (RMNET_MODE_LLP_ETH | \
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RMNET_MODE_LLP_IP | \
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RMNET_MODE_QOS)
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#define RMNET_IS_MODE_QOS(mode) \
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((mode & RMNET_MODE_QOS) == RMNET_MODE_QOS)
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#define RMNET_IS_MODE_IP(mode) \
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((mode & RMNET_MODE_LLP_IP) == RMNET_MODE_LLP_IP)
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/* IOCTL command enum
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* Values chosen to not conflict with other drivers in the ecosystem */
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enum rmnet_ioctl_cmds_e {
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RMNET_IOCTL_SET_LLP_ETHERNET = 0x000089F1, /* Set Ethernet protocol */
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RMNET_IOCTL_SET_LLP_IP = 0x000089F2, /* Set RAWIP protocol */
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RMNET_IOCTL_GET_LLP = 0x000089F3, /* Get link protocol */
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RMNET_IOCTL_SET_QOS_ENABLE = 0x000089F4, /* Set QoS header enabled */
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RMNET_IOCTL_SET_QOS_DISABLE = 0x000089F5, /* Set QoS header disabled*/
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RMNET_IOCTL_GET_QOS = 0x000089F6, /* Get QoS header state */
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RMNET_IOCTL_GET_OPMODE = 0x000089F7, /* Get operation mode */
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RMNET_IOCTL_OPEN = 0x000089F8, /* Open transport port */
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RMNET_IOCTL_CLOSE = 0x000089F9, /* Close transport port */
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RMNET_IOCTL_FLOW_ENABLE = 0x000089FA, /* Flow enable */
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RMNET_IOCTL_FLOW_DISABLE = 0x000089FB, /* Flow disable */
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RMNET_IOCTL_FLOW_SET_HNDL = 0x000089FC, /* Set flow handle */
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RMNET_IOCTL_EXTENDED = 0x000089FD, /* Extended IOCTLs */
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RMNET_IOCTL_MAX
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};
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enum rmnet_ioctl_extended_cmds_e {
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/* RmNet Data Required IOCTLs */
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RMNET_IOCTL_GET_SUPPORTED_FEATURES = 0x0000, /* Get features */
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RMNET_IOCTL_SET_MRU = 0x0001, /* Set MRU */
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RMNET_IOCTL_GET_MRU = 0x0002, /* Get MRU */
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RMNET_IOCTL_GET_EPID = 0x0003, /* Get endpoint ID */
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RMNET_IOCTL_GET_DRIVER_NAME = 0x0004, /* Get driver name */
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RMNET_IOCTL_ADD_MUX_CHANNEL = 0x0005, /* Add MUX ID */
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RMNET_IOCTL_SET_EGRESS_DATA_FORMAT = 0x0006, /* Set EDF */
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RMNET_IOCTL_SET_INGRESS_DATA_FORMAT = 0x0007, /* Set IDF */
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RMNET_IOCTL_SET_AGGREGATION_COUNT = 0x0008, /* Set agg count */
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RMNET_IOCTL_GET_AGGREGATION_COUNT = 0x0009, /* Get agg count */
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RMNET_IOCTL_SET_AGGREGATION_SIZE = 0x000A, /* Set agg size */
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RMNET_IOCTL_GET_AGGREGATION_SIZE = 0x000B, /* Get agg size */
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RMNET_IOCTL_FLOW_CONTROL = 0x000C, /* Do flow control */
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RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL = 0x000D, /* For legacy use */
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RMNET_IOCTL_GET_HWSW_MAP = 0x000E, /* Get HW/SW map */
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RMNET_IOCTL_SET_RX_HEADROOM = 0x000F, /* RX Headroom */
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RMNET_IOCTL_GET_EP_PAIR = 0x0010, /* Endpoint pair */
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RMNET_IOCTL_SET_QOS_VERSION = 0x0011, /* 8/6 byte QoS hdr*/
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RMNET_IOCTL_GET_QOS_VERSION = 0x0012, /* 8/6 byte QoS hdr*/
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RMNET_IOCTL_GET_SUPPORTED_QOS_MODES = 0x0013, /* Get QoS modes */
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RMNET_IOCTL_SET_SLEEP_STATE = 0x0014, /* Set sleep state */
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RMNET_IOCTL_SET_XLAT_DEV_INFO = 0x0015, /* xlat dev name */
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RMNET_IOCTL_DEREGISTER_DEV = 0x0016, /* Dereg a net dev */
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RMNET_IOCTL_EXTENDED_MAX = 0x0017
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};
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/* Return values for the RMNET_IOCTL_GET_SUPPORTED_FEATURES IOCTL */
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#define RMNET_IOCTL_FEAT_NOTIFY_MUX_CHANNEL (1<<0)
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#define RMNET_IOCTL_FEAT_SET_EGRESS_DATA_FORMAT (1<<1)
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#define RMNET_IOCTL_FEAT_SET_INGRESS_DATA_FORMAT (1<<2)
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#define RMNET_IOCTL_FEAT_SET_AGGREGATION_COUNT (1<<3)
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#define RMNET_IOCTL_FEAT_GET_AGGREGATION_COUNT (1<<4)
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#define RMNET_IOCTL_FEAT_SET_AGGREGATION_SIZE (1<<5)
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#define RMNET_IOCTL_FEAT_GET_AGGREGATION_SIZE (1<<6)
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#define RMNET_IOCTL_FEAT_FLOW_CONTROL (1<<7)
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#define RMNET_IOCTL_FEAT_GET_DFLT_CONTROL_CHANNEL (1<<8)
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#define RMNET_IOCTL_FEAT_GET_HWSW_MAP (1<<9)
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/* Input values for the RMNET_IOCTL_SET_EGRESS_DATA_FORMAT IOCTL */
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#define RMNET_IOCTL_EGRESS_FORMAT_MAP (1<<1)
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#define RMNET_IOCTL_EGRESS_FORMAT_AGGREGATION (1<<2)
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#define RMNET_IOCTL_EGRESS_FORMAT_MUXING (1<<3)
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#define RMNET_IOCTL_EGRESS_FORMAT_CHECKSUM (1<<4)
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/* Input values for the RMNET_IOCTL_SET_INGRESS_DATA_FORMAT IOCTL */
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#define RMNET_IOCTL_INGRESS_FORMAT_MAP (1<<1)
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#define RMNET_IOCTL_INGRESS_FORMAT_DEAGGREGATION (1<<2)
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#define RMNET_IOCTL_INGRESS_FORMAT_DEMUXING (1<<3)
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#define RMNET_IOCTL_INGRESS_FORMAT_CHECKSUM (1<<4)
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#define RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA (1<<5)
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/* User space may not have this defined. */
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#ifndef IFNAMSIZ
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#define IFNAMSIZ 16
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#endif
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struct rmnet_ioctl_extended_s {
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uint32_t extended_ioctl;
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union {
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uint32_t data; /* Generic data field for most extended IOCTLs */
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/* Return values for
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* RMNET_IOCTL_GET_DRIVER_NAME
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* RMNET_IOCTL_GET_DFLT_CONTROL_CHANNEL */
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int8_t if_name[IFNAMSIZ];
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/* Input values for the RMNET_IOCTL_ADD_MUX_CHANNEL IOCTL */
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struct {
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uint32_t mux_id;
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int8_t vchannel_name[IFNAMSIZ];
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} rmnet_mux_val;
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/* Input values for the RMNET_IOCTL_FLOW_CONTROL IOCTL */
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struct {
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uint8_t flow_mode;
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uint8_t mux_id;
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} flow_control_prop;
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/* Return values for RMNET_IOCTL_GET_EP_PAIR */
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struct {
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uint32_t consumer_pipe_num;
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uint32_t producer_pipe_num;
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} ipa_ep_pair;
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struct {
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uint32_t __data; /* Placeholder for legacy data*/
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uint32_t agg_size;
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uint32_t agg_count;
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} ingress_format;
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} u;
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};
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struct rmnet_ioctl_data_s {
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union {
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uint32_t operation_mode;
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uint32_t tcm_handle;
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} u;
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};
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#define RMNET_IOCTL_QOS_MODE_6 (1<<0)
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#define RMNET_IOCTL_QOS_MODE_8 (1<<1)
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/* QMI QoS header definition */
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#define QMI_QOS_HDR_S __attribute((__packed__)) qmi_qos_hdr_s
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struct QMI_QOS_HDR_S {
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unsigned char version;
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unsigned char flags;
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unsigned long flow_id;
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};
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/* QMI QoS 8-byte header. */
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struct qmi_qos_hdr8_s {
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struct QMI_QOS_HDR_S hdr;
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uint8_t reserved[2];
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} __attribute((__packed__));
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#endif /* _MSM_RMNET_H_ */
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