forked from rubenslte/android_kernel_samsung_msm8226
Saravana Kannan
c7a851a6bd
The CPUBW HW monitor devfreq governor uses the Krait L2 PM counters to determine the bandwidth needed by the Krait CPU subsystem. This governor can be used in conjunction with the CPUBW devfreq device to dynamically scale the DDR frequency based on the demand/actual usage from the Krait CPU subsystem. Since this governor uses the Krait L2 PM counters it can conflict with certain profiling tools. The Krait L2 performance monitor counters have the capability to count the no. of read/write transactions going out the master ports. They also have the capability to raise interrupts when they overflow. This driver uses those counters to determine the true usage of DDR from the Krait processor subsystem and then recommends CPU DDR BW votes based on the measured values and the following tunable parameters. The driver provides various tunables that allow it to be tuned more in favor of power or performance: - io_percent: The percentage of the CPU time that can be spent waiting on memory I/O. Lower value is better performance and worse power. - sample_ms: The sampling period in milliseconds. This only affects the sampling period when DDR use is ramping down or is increasing very slowly (See tolerance_percent). - tolerance_percent: The minimum increase in DDR use, compared to previous sample, that will trigger an IRQ to immediately bump up the bandwidth vote. It's expressed as a percentage of the previous sampled DDR use. - decay_rate: The parameter controls the rate at which the history is forgotten when ramping down. This is expressed as a percentage of history to be forgotten. So 100% means ignore history, 0% mean never forget the historical max. The default 90% means forget 90% of history each time. - guard_band_mbps: This is a margin that's added to the measured BW (and hence also the Bus BW votes) that's present to account for the time it takes to ramp up the DDR BW while the CPU continues to use the DDR. - bw_step: All BW votes are rounded up to multiples of bw_step. The default value is 200 MB/s that turns out to ~25 or 12.5 MHz based on the SoC. A smaller value would mean more frequent bus BW changes. A higher value would mean less frequent BW vote updates, but also means at times an unnecessarily higher BW vote (due to the rounding up). Change-Id: I88629a3e545cdca7160af8f8ca616ecc949d9947 Signed-off-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Panwar Vivek <vpanwa@codeaurora.org>
109 lines
4.1 KiB
Plaintext
109 lines
4.1 KiB
Plaintext
menuconfig PM_DEVFREQ
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bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
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help
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A device may have a list of frequencies and voltages available.
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devfreq, a generic DVFS framework can be registered for a device
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in order to let the governor provided to devfreq choose an
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operating frequency based on the device driver's policy.
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Each device may have its own governor and policy. Devfreq can
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reevaluate the device state periodically and/or based on the
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notification to "nb", a notifier block, of devfreq.
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Like some CPUs with CPUfreq, a device may have multiple clocks.
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However, because the clock frequencies of a single device are
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determined by the single device's state, an instance of devfreq
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is attached to a single device and returns a "representative"
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clock frequency of the device, which is also attached
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to a device by 1-to-1. The device registering devfreq takes the
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responsiblity to "interpret" the representative frequency and
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to set its every clock accordingly with the "target" callback
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given to devfreq.
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When OPP is used with the devfreq device, it is recommended to
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register devfreq's nb to the OPP's notifier head. If OPP is
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used with the devfreq device, you may use OPP helper
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functions defined in devfreq.h.
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if PM_DEVFREQ
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comment "DEVFREQ Governors"
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config DEVFREQ_GOV_SIMPLE_ONDEMAND
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tristate "Simple Ondemand"
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help
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Chooses frequency based on the recent load on the device. Works
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similar as ONDEMAND governor of CPUFREQ does. A device with
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Simple-Ondemand should be able to provide busy/total counter
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values that imply the usage rate. A device may provide tuned
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values to the governor with data field at devfreq_add_device().
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config DEVFREQ_GOV_PERFORMANCE
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tristate "Performance"
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help
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Sets the frequency at the maximum available frequency.
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This governor always returns UINT_MAX as frequency so that
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the DEVFREQ framework returns the highest frequency available
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at any time.
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config DEVFREQ_GOV_POWERSAVE
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tristate "Powersave"
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help
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Sets the frequency at the minimum available frequency.
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This governor always returns 0 as frequency so that
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the DEVFREQ framework returns the lowest frequency available
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at any time.
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config DEVFREQ_GOV_USERSPACE
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tristate "Userspace"
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help
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Sets the frequency at the user specified one.
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This governor returns the user configured frequency if there
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has been an input to /sys/devices/.../power/devfreq_set_freq.
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Otherwise, the governor does not change the frequnecy
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given at the initialization.
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config DEVFREQ_GOV_MSM_ADRENO_TZ
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tristate "MSM Adreno Trustzone"
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depends on MSM_KGSL && MSM_SCM
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help
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Trustzone based governor for the Adreno GPU.
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Sets the frequency using a "on-demand" algorithm.
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This governor is unlikely to be useful for other devices.
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config DEVFREQ_GOV_MSM_CPUFREQ
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bool "MSM CPUfreq"
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depends on CPU_FREQ_MSM
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help
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MSM CPUfreq based governor for CPU bandwidth voting. Sets the CPU
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to DDR BW vote based on the current CPU frequency. This governor
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is unlikely to be useful for non-MSM devices.
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config DEVFREQ_GOV_MSM_CPUBW_HWMON
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tristate "HW monitor based governor for CPUBW"
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depends on ARCH_MSM_KRAIT
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help
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HW monitor based governor for CPU to DDR bandwidth voting. This
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goveror currently supports only Krait L2 PM counters. Sets the CPU
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BW vote by using L2 PM counters to monitor the Krait's use of DDR.
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Since this governor uses some of the PM counters it can conflict
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with existing profiling tools. This governor is unlikely to be
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useful for other devices.
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comment "DEVFREQ Drivers"
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config ARM_EXYNOS4_BUS_DEVFREQ
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bool "ARM Exynos4210/4212/4412 Memory Bus DEVFREQ Driver"
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depends on CPU_EXYNOS4210 || CPU_EXYNOS4212 || CPU_EXYNOS4412
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select ARCH_HAS_OPP
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select DEVFREQ_GOV_SIMPLE_ONDEMAND
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help
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This adds the DEVFREQ driver for Exynos4210 memory bus (vdd_int)
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and Exynos4212/4412 memory interface and bus (vdd_mif + vdd_int).
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It reads PPMU counters of memory controllers and adjusts
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the operating frequencies and voltages with OPP support.
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To operate with optimal voltages, ASV support is required
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(CONFIG_EXYNOS_ASV).
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endif # PM_DEVFREQ
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