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Author SHA1 Message Date
Ralf Baechle 07a801def4 MIPS: DSP: Set all register masks to 0x3ff. 
0x2ff was a typo and the value 0x1f of DSP_MASK was refering to an old
version of the documentation.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-01-10 13:39:04 +00:00
Ralf Baechle da2c9ed55b MIPS: DSP: Context switch the DSPcontrol register also. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-01-10 13:39:04 +00:00
Ralf Baechle e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:17 +01:00