From a7ed4f5ac6e6f02c2d0923e1bd81f712b71edf07 Mon Sep 17 00:00:00 2001
From: Ke Liu <keliu@codeaurora.org>
Date: Fri, 10 Jan 2014 11:58:33 -0800
Subject: [PATCH] ARM: dts: update frequency to corner and quot mapping for CPR
 on msm8926

Some devices need to adjust their CPR quotient value according to the cpu
frequency. The existing configuration uses the same fuse target quotient
for each frequency in a given corner. This configuration is not power
efficient as some corners have a large range of frequencies. Hence use a
virtual corner for each frequency for power saving purposes.

CRs-Fixed: 583719
Change-Id: I73ebcc05c4cd040df6dae777cf515eba4fdebfb4
Signed-off-by: Ke Liu <keliu@codeaurora.org>
---
 arch/arm/boot/dts/msm8926.dtsi | 49 +++++++++++++++++++---------------
 1 file changed, 28 insertions(+), 21 deletions(-)

diff --git a/arch/arm/boot/dts/msm8926.dtsi b/arch/arm/boot/dts/msm8926.dtsi
index 963c1b879b5..1c8fe4a79e1 100644
--- a/arch/arm/boot/dts/msm8926.dtsi
+++ b/arch/arm/boot/dts/msm8926.dtsi
@@ -45,39 +45,46 @@
 		reg-names = "rcg-base", "efuse";
 		qcom,speed0-bin-v1 =
 			<         0 0>,
-			< 384000000 1>,
-			< 787200000 2>,
-			<1190400000 3>;
+			< 384000000 2>,
+			< 787200000 4>,
+			<1190400000 7>;
 		qcom,speed6-bin-v1 =
 			<         0 0>,
-			< 384000000 1>,
-			< 787200000 2>,
-			<1190400000 3>;
+			< 384000000 2>,
+			< 787200000 4>,
+			<1190400000 7>;
 		qcom,speed2-bin-v1 =
 			<         0 0>,
-			< 384000000 1>,
-			< 787200000 2>,
-			<1401600000 3>;
+			< 384000000 2>,
+			< 787200000 4>,
+			<1401600000 10>;
 		qcom,speed5-bin-v1 =
 			<         0 0>,
-			< 384000000 1>,
-			< 787200000 2>,
-			<1401600000 3>;
+			< 384000000 2>,
+			< 787200000 4>,
+			<1401600000 10>;
 		qcom,speed4-bin-v1 =
 			<         0 0>,
-			< 384000000 1>,
-			< 787200000 2>,
-			<1401600000 3>;
+			< 384000000 2>,
+			< 787200000 4>,
+			<1401600000 10>;
 		qcom,speed7-bin-v1 =
 			<         0 0>,
-			< 384000000 1>,
-			< 787200000 2>,
-			<1401600000 3>;
+			< 384000000 2>,
+			< 787200000 4>,
+			<1401600000 10>;
 		qcom,speed1-bin-v1 =
 			<         0 0>,
-			< 384000000 1>,
-			< 787200000 2>,
-			<1593600000 3>;
+			< 384000000 2>,
+			< 787200000 4>,
+			< 998400000 5>,
+			<1094400000 6>,
+			<1190400000 7>,
+			<1305600000 8>,
+			<1344000000 9>,
+			<1401600000 10>,
+			<1497600000 11>,
+			<1593600000 12>;
 	};
 
 	qcom,msm-thermal {