diff --git a/drivers/gpu/msm/adreno_a3xx_snapshot.c b/drivers/gpu/msm/adreno_a3xx_snapshot.c
index 78e15cbfa67..c8f0101c6ee 100644
--- a/drivers/gpu/msm/adreno_a3xx_snapshot.c
+++ b/drivers/gpu/msm/adreno_a3xx_snapshot.c
@@ -463,14 +463,23 @@ void *a3xx_snapshot(struct adreno_device *adreno_dev, void *snapshot,
 	size = (adreno_is_a330(adreno_dev) ||
 		adreno_is_a305b(adreno_dev)) ? 0x2E : 0x14;
 
-	snapshot = kgsl_snapshot_indexed_registers(device, snapshot,
-			remain, REG_CP_STATE_DEBUG_INDEX,
-			REG_CP_STATE_DEBUG_DATA, 0x0, size);
+	/* Skip indexed register dump for these chipsets 8974, 8x26, 8x10 */
+	if (adreno_is_a330(adreno_dev) ||
+		adreno_is_a330v2(adreno_dev) ||
+		adreno_is_a305b(adreno_dev) ||
+		adreno_is_a305c(adreno_dev)	) {
+		KGSL_DRV_ERR(device,
+		"Skipping indexed register dump\n");
+	} else {
+		snapshot = kgsl_snapshot_indexed_registers(device, snapshot,
+				remain, REG_CP_STATE_DEBUG_INDEX,
+				REG_CP_STATE_DEBUG_DATA, 0x0, size);
 
-	/* CP_ME indexed registers */
-	snapshot = kgsl_snapshot_indexed_registers(device, snapshot,
-			remain, REG_CP_ME_CNTL, REG_CP_ME_STATUS,
-			64, 44);
+		/* CP_ME indexed registers */
+		snapshot = kgsl_snapshot_indexed_registers(device, snapshot,
+				remain, REG_CP_ME_CNTL, REG_CP_ME_STATUS,
+				64, 44);
+	}
 
 	/* VPC memory */
 	snapshot = kgsl_snapshot_add_section(device,